Microcode problems

I strongly recommend against looking at the solutions for the problems below until you have attempted the problems. (That's why I put the solutions on separate web pages.) There is no need to print the solutions out now; they'll be here when you come back, at least through the date of the final exam.

Problem #1

 Write microcode for our simple one-bus architecture to perform the VELMA instruction "MOV@ R0, M".

Problem #2

 a) Write microcode for our simple one-bus architecture to perform the VELMA instruction "JSR M". For this question you can assume a "Zero Bus" control line which puts the value 0 on the bus (thus no _out control lines should be on in the same cycle).

b) Give a convincing argument that your "Write" and "Wait MFC" control lines cannot be put any farther away from each other in time.

Problem #3

 a) Write microcode steps for our simple one-bus architecture to exchange the contents of R1 and R2.

b) Sketch a reasonable two-bus architecture which allows us to exchange the contents of R1 and R2 in fewer steps, and state the steps.

Problem #4

 Here is a microcode snippet which does R4 <- M[2] + M[3] + R0. It makes use of a "Zero Bus" control line which puts a zero on the bus. (In this case memory locations 2 and 3 are actual memory locations, not punning names for registers like in VELMA.)

10. Zero Bus, Zero A, Set Carry-In, Add, Zin
11. Zout, Zero A, Set Carry-In, Add, Zin
12. Zout, MARin, Read, Wait MFC
13. MDRout, Yin
14. Zout, Zero A, Set Carry-In, Add, Zin
15. Zout, MARin, Read, Wait MFC
16. MDRout, Add, Zin
17. Zout, Yin
18. R0out, Add, Zin
19. Zout, R4in

a) Speed this up without hardware changes. (Steps 10 and 11 will remain the same, I think.)

b) Suggest simple and reasonable extra hardware to speed this up further (probably in steps 10 and/or 11). Propose a name for the additional control line(s) and present faster microcode.

Problem #5

 Write microcode using our standard one-bus architecture to count the number of bits which are 1 in the contents of R0. The count goes into R1. There is still the "Zero Bus" control line from question 4 above, and there is a "Left-Shift Y" control line which does a logical left-shift of the contents of Y (leaving the result in Y -- that is, it's a shift register, and this is the shift control line). The bit shifted in on the right is the carry bit which can be set with a Set Carry-In (you will want this to be off). The newly-shifted Y value is available as the 'A' ALU operand in the same cycle.

You will need to use a µbranch-target field in your microinstruction word to make a loop. When doing a microbranch (e.g. "If C", or with any condition code or its negation), instead of the 'then' operation being "End" (go to zero), you can specify the value of the µbranch target and it will go to that step instead of to zero. There is also a "Go To" control line in the microinstruction word, which causes the µPC to be unconditionally changed to the location specified in the µbranch target field. (The current microinstruction still completes in any case.)

Problem #6

 We've only examined reading and writing entire words to and from the memory unit. For a byte-addressable computer, what new memory unit features do we need to implement "byte" instructions?

It turns out that we don't need any help from the main memory unit. Here is a scheme for implementing "byte-addressability" exclusively in the CPU. The memory unit will have indivisible 16-bit words, and we will access half-words as bytes.

In accessing an entire word, we will use even-numbered addresses only. We'll implement this by simply moving the wires around: a memory address of 11010010, which is the 11010010th byte or 1101001th word, needs to be specified as "1101001" rather than "11010010" to the main memory unit, but we just shift the bits down when wiring. The MAR itself will still contain "11010010".

Now, suppose we want to read from byte 11010011? The MAR can contain 11010011, but when we have either 11010011 or 11010010 in the MAR, when we turn on the Read control line we will read the entire word into the MDR. So it's not quite what we need, but it's very close. We just want the low eight bits of this word, sign-extended into the high bits. We will add a control line called "Extend" which replaces the high eight bits coming from the MDR to the bus with the sign extension of the low eight bits. For example, if the MDR contains 0001011101001101 and "Extend" is on, the value supplied to the bus will be 0000000001001101 (if MDRout is on). If the MDR contains 0001011111001101 and "Extend" is on, the value supplied to the bus will be 1111111111001101 (if MDRout is on).

How about the high eight bits? To read byte number 11010010, "Extend" doesn't suffice because it will suppress the wrong eight bits (it will constitute reading byte number 11010011).

So a control line named "SWAB" for "swap bytes" (after the PDP-11 instruction name) causes the 16 bits coming out of the MDR to the bus to be byte-swapped. When the "SWAB" line is off (i.e. "SWAB" is not listed in the text version of the microcode instruction), the data from the MDR goes to the bus in the normal manner (if MDRout is on).

Assignment problems:

a) Implement the SWAB and Extend lines in circuitry (draw a logic gate diagram). Show the output coming from the MDR register and going into tristate devices and to the bus. Show the control lines MDRout, SWAB, and Extend going into your circuitry. The right side of your diagram will have sixteen lines marked "to CPU bus". Be sure that Extend and SWAB work together as desired if they are both on.

b) Write microcode steps to perform the operation "MOVB 223, R1". The address 223 is available via AddressFieldOfIRout.

c) Write microcode steps to perform the operation "MOVB 224, R1". The address 224 is available via AddressFieldOfIRout.

d) Write microcode steps to implement the PDP-11 operation "SWAB R0" by passing the contents through the MDR.

e) To write only one byte, we need a control line which sets only the low eight bits of the MDR, leaving the high eight bits as they were. Let's call it MDRLow$in$. Write microcode steps to perform the operation "MOVB R1, 223".

f) Similarly, write microcode steps to perform the operation "MOVB R1, 224". (This combines elements of most of the above, including the SWAB.)

[CSC 258 additional problems]
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